1. Technical Field
The present disclosure relates to a protection apparatus against electrostatic discharges for an integrated circuit and the related integrated circuit.
2. Description of the Related Art
Integrated circuits provide a high degree of functionality in a very small area, such functionalities may include a storage of data, processing of data, reception and transmission of radiofrequency data, etc. Integrated circuits typically comprise millions of transistors with sizes of the order of microns. It is known that bipolar and MOS transistors are subject to destructive breakdown phenomena when they undergo overvoltages due to electrostatic charges. For example, the gate oxide of a CMOS transistor, because of its minimal size, is susceptible to breakdown due to the static electricity, which is commonly referred to as electrostatic discharge or ESD. If one of the transistors of an integrated circuit is damaged by an electrostatic discharge or ESD, the integrated circuit becomes unusable.
For such a reason, integrated circuits comprise protection apparatuses against ESD or commonly ESD protection apparatuses. A diagram of a circuital apparatus for ESD protection is shown in FIG. 1. In the figure there are shown PADs 1, 2 connected to the supply voltages Vdd and Vss and a PAD 3 connected to the supply voltages Vdd and Vss by means of protection devices 10, usually diodes; the same two supply voltages Vdd and Vss are connected to each other by means of circuitry 11, referred to as “power clamp cell” that allows a discharge path for the PADs. The radiofrequency circuit 23 of the integrated circuit is connected to the output PAD 3; the same circuit 23 is coupled to the two supply voltages Vdd and Vss by means of the protection circuits 10.
For high frequency applications the main problem consists of the capacitive contribution of the protection circuits 10, denoted by the parasitic capacitances Cpar. Such parasitic capacitances may strongly limit the performances and reliability of the high frequency circuits.
Different apparatuses have been proposed to overcome said problems.
US 2007/0296055 describes a circuital apparatus for the protection against ESD of a radiofrequency integrated circuit wherein the radiofrequency PAD adapted to transmit the radiofrequency signal of the radiofrequency internal circuit is connected to the voltage supply Vss by means of an inductor belonging to the circuital apparatus for protecting against ESD.
U.S. Pat. No. 7,010,279 describes a circuital apparatus for protecting against ESD of a radiofrequency integrated circuit comprising a transformer balun, an impedance circuit, and a clamping circuit. The transformer balun allows a radiofrequency differential signal to be converted into a single-ended radiofrequency signal. The transformer balun comprises a first winding coupled to the single-ended radiofrequency signals and a second winding coupled to the radiofrequency differential signals. The impedance matching circuit is coupled to the first winding and provides, in conjunction with the impedance of the transformer balun, the impedance matching with an antenna for transmitting the radiofrequency signal. The clamping circuit is operatively coupled to the transformer balun and/or to the impedance matching circuit and, in combination with the transformer and/or the impedance matching circuit, provides protection against ESD for the receiving or transmitting section of the radiofrequency integrated circuit. However in such a way the matching circuit intervenes in protecting the integrated circuit against ESD and this, mainly due to the use of inductors having a resistive component, limits the performances of the radiofrequency or higher frequencies integrated circuits.